Dr. David J. Pearce

Compiling Whiley to FPGAs

Author(s). Baptiste Pauget.

Venue. Project Thesis, Victoria University of Wellington, 2017.

Abstract. Improving code performances lies more and more in the relevant use of computational helpers. Computing platforms like OpenCL or CUDA that enable to relocate resource consuming calculations to graphics processing unit (GPU) are now ordinary. Theses frameworks are rather low-level and require either a thorough learning or the use of higher level libraries that reduce their flexibility. A orthogonal concern of programming language is static checking. As the rise of strongly typed languages (Rust, Scala, Haskell, …) reveals it, extended static checking is well-liked since it improves greatly the development process, lowering the debug work. The Whiley language goes a step further, by providing an embedded support for specification, giving a chance to adjust the scope of compilation-time checks. Targeting Field Programmable Gate Arrays (FPGAs) for Whiley compilation tries to gather these two goals.

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